MEC1404 Datasheet, PDF (212/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
12.10.3 MEMORY BASE ADDRESS 0 REGISTER
Offset ^04h
Bits
Description
Type
31:2 MEMORY_BASE_ADDRESS_0
R/W
This memory base address defines the beginning of region 0 in the
Embedded Controller’s 32-bit internal address space. Memory allo-
cated to region 0 is intended to be shared between the Host and
the EC. The region defined by this base register is used when bit
15 of the EC Address Register is 0. The access will be to a mem-
ory location at an offset defined by the EC_Address relative to the
beginning of the region defined by this register. Therefore, a read
or write to the memory that is triggered by the EC Data Register will
occur at Memory_Base_Address_0 + EC_Address.
1:0 Reserved
R
12.10.4 MEMORY READ LIMIT 0 REGISTER
Default
0h
Reset
Event
nSYSR
ST
-
-
Offset ^08h
Bits
Description
Type
15 Reserved
R
14:2 MEMORY_READ_LIMIT_0
R/W
Whenever a read of any byte in the EC Data Register is attempted,
and bit 15 of EC_Address is 0, the field EC_Address[14:2] in the
EC_Address_Register is compared to this field. As long as EC_Ad-
dress[14:2] is less than this field the EC_Data_Register will be
loaded from the 32-bit internal address space.
1:0 Reserved
R
Default
-
0h
Reset
Event
-
nSYSR
ST
-
-
DS00001956D-page 212
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