MEC1404 Datasheet, PDF (183/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
10.12 JTVIC Registers
The registers listed in the JTVIC Register Summary table are for a single instance of the Jump Table Vectored Interrupt
Controller (JTVIC). The addresses of each register listed in this table are defined as a relative offset to the host “Base
Address” defined in the EC-Only Register Base Address Table.
TABLE 10-3: EC-ONLY REGISTER BASE ADDRESS TABLE
Block Instance
Interrupt Controller
Instance
Number
0
Host
EC
Address Space
32-bit internal
address space
Base Address
1FFF_C000h
The Base Address indicates where the first register can be accessed in a particular address space for a block instance.
TABLE 10-4: JTVIC REGISTER SUMMARY
Offset
Register Name
Interrupt Source, Enable Set, Enable Clear, and Result Registers
00h
GIRQ8 Source Register
04h
GIRQ8 Enable Set Register
08h
GIRQ8 Enable Clear Register
0Ch
GIRQ8 Result Register
10h
GIRQ9 Source Register
14h
GIRQ9 Enable Set Register
18h
GIRQ9 Enable Clear Register
1Ch
GIRQ9 Result Register
20h
GIRQ10 Source Register
24h
GIRQ10 Enable Set Register
28h
GIRQ10 Enable Clear Register
2Ch
GIRQ10 Result Register
30h
GIRQ11 Source Register
34h
GIRQ11 Enable Set Register
38h
GIRQ11 Enable Clear Register
3Ch
GIRQ11 Result Register
40h
GIRQ12 Source Register
44h
GIRQ12 Enable Set Register
48h
GIRQ12 Enable Clear Register
4Ch
GIRQ12 Result Register
 2015 - 2016 Microchip Technology Inc.
DS00001956D-page 183