MEC1404 Datasheet, PDF (207/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
12.9.4 EC ADDRESS MSB REGISTER
Offset ^03h
Bits
Description
Type
7 REGION
R/W
The field specifies which of two segments in the 32-bit internal
address space is to be accessed by the EC_Address[14:2] to gen-
erate accesses to the memory.
1= The address defined by EC_Address[14:2] is relative to the base
address specified by the Memory Base Address 1 Register.
0= The address defined by EC_Address[14:2] is relative to the base
address specified by the Memory Base Address 0 Register.
6:0 EC_ADDRESS_MSB
R/W
This field defines bits[14:8] of EC_Address. Bits[1:0] of the EC_Ad-
dress are always forced to 00b.
The EC_Address is aligned on a DWord boundary. It is the address
of the memory being accessed by EC Data Byte 0 Register, which
is an offset from the programmed base address of the selected
REGION.
12.9.5 EC DATA BYTE 0 REGISTER
Default
0h
Reset
Event
nSYSR
ST
0h
nSYSR
ST
Offset ^04h
Bits
Description
Type
7:0 EC_DATA_BYTE_0
R/W
This is byte 0 (Least Significant Byte) of the 32-bit EC Data Regis-
ter.
Use of the Data Byte registers to access EC memory is defined in
detail in Section 12.8.2, "EC Data Register".
12.9.6 EC DATA BYTE 1 REGISTER
Default
0h
Reset
Event
nSYSR
ST
Offset ^05h
Bits
Description
7:0 EC_DATA_BYTE_1
This is byte 1 of the 32-bit EC Data Register.
Use of the Data Byte registers to access EC memory is defined in
detail in Section 12.8.2, "EC Data Register".
Type
R/W
Default
0h
Reset
Event
nSYSR
ST
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