MEC1404 Datasheet, PDF (314/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
//Disable interrupts
irqEnableSave = IRQ_ENABLE;
IRQ_ENABLE = 0;
//Read 15-bit clk divider reading register, save result in A
cd_value1 = WTIMER->CLOCK_DIVIDER;
//Read 28 bit up-counter timer register, save result in B
wct_value = WTIMER->WEEK_COUNTER_TIMER;
//Read 15-bit clk divider reading register, save result in C
cd_value2 = WTIMER->CLOCK_DIVIDER;
if (0 == cd_value2)
{
wct_value = wct_value + 1;
}
else if ( (cd_value2 < cd_value1) || (0 == cd_value1))
{
wct_value = WTIMER->WEEK_COUNTER_TIMER;
}
//Enable interrupts
IRQ_ENABLE = irqEnableSave;
return (WTIMER_BASE + ((wct_value << 10) | (cd_value2>>5)));
}
21.10 Runtime Registers
The addresses of each register listed in this table are defined as a relative offset to the host “Base Address” defined in
Runtime Register Base Address Table.
TABLE 21-8: RUNTIME REGISTER BASE ADDRESS TABLE
Block Instance
Week Alarm
Instance
Number
0
Host
EC
Address Space
32-bit internal
Address Space
Base Address
0000_CC80h
The Base Address indicates where the first register can be accessed in a particular address space for a block instance.
Add the register’s Offset to this value to obtain the direct address of the register.
TABLE 21-9: RUNTIME REGISTER SUMMARY
Offset
00h
04h
08h
0Ch
10h
14h
18h
Register Name (Mnemonic)
Control Register
Week Alarm Counter Register
Week Timer Compare Register
Clock Divider Register
Sub-Second Programmable Interrupt Select Register
Sub-Week Control Register
Sub-Week Alarm Counter Register
DS00001956D-page 314
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