MEC1404 Datasheet, PDF (333/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
Note 22-1
Note 22-2
The Base Address indicates where the first register can be accessed in a particular address space
for a block instance.
The GPIO registers may be accessed by the LPC Host via the EMI block via GPIO commands or by
direct access if enabled by firmware. See the firmware documentation for a description of this access
method.
TABLE 22-2: REGISTER SUMMARY
Offset
Register Name
000h
Reserved
(GPIO000 not implemented)
004h - 01Ch GPIO001-GPIO007 Pin Control Register
020h - 03Ch GPIO010-GPIO017 Pin Control Register
040h - 05Ch GPIO020-GPIO027 Pin Control Register
060h - 078h GPIO030-GPIO036 Pin Control Register
080h - 09Ch GPIO040-GPIO047 Pin Control Register
0A0h - 0BCh GPIO050-GPIO057 Pin Control Register
0C0h - 0CCh GPIO060-GPIO063 Pin Control Register
0D0h
0D4h - 0D8h
0DCh
Reserved
(GPIO064 not implemented - see Note 22-4)
GPIO065-GPIO066 Pin Control Register
Reserved
(GPIO067 not implemented - see Note 22-4)
0E0h - 0F8h Reserved
(GPIO070-GPIO076 not implemented)
100h - 11Ch
120h - 13Ch
140h - 15Ch
160h - 178h
180h - 19Ch
1A0h - 1BCh
1C0h - 1D8h
280h
(Note 22-3)
GPIO100-GPIO107 Pin Control Register
GPIO110-GPIO117 Pin Control Register
GPIO120-GPIO127 Pin Control Register
GPIO130-GPIO136 Pin Control Register
GPIO140-GPIO147 Pin Control Register
GPIO150-GPIO157 Pin Control Register
GPIO160-GPIO166 Pin Control Register
Output GPIO[000:036]
284h
Output GPIO[040:076]
(Note 22-3)
288h
(Note 22-3)
28Ch
(Note 22-3)
Output GPIO[100:127]
Output GPIO[140:176]
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DS00001956D-page 333