MEC1404 Datasheet, PDF (416/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
30.11.3 KSI STATUS REGISTER
Offset ^0Ch
Bits
Description
Type
31:8 Reserved
7:0 KSI_STATUS
Each bit in this field is set on the falling edge of the corresponding
KSI input pin.
A KSI interrupt is generated when its corresponding status bit and
interrupt enable bit are both set. KSI interrupts are logically ORed
together to produce KSC_INT and KSC_INT_WAKE.
Writing a ‘1’ to a bit will clear it. Writing a ‘0’ to a bit has no effect.
R
R/WC
Default
-
0h
Reset
Event
-
nSYSR
ST
30.11.4 KSI INTERRUPT ENABLE REGISTER
Offset ^10h
Bits
Description
Type
31:8 Reserved
R
7:0 KSI_INT_EN
R/W
Each bit in KSI_INT_EN enables interrupt generation due to high-
to-low transition on a KSI input. An interrupt is generated when the
corresponding bits in KSI_STATUS and KSI_INT_EN are both set.
Default
-
0h
Reset
Event
-
nSYSR
ST
30.11.5 KEYSCAN EXTENDED CONTROL REGISTER
Offset ^14h
Bits
Description
32:1 Reserved
0 PREDRIVE_ENABLE
PREDRIVE_ENABLE enables the PREDRIVE mode to
actively drive the KSO pins high for approximately 100
ns before switching to open-drain operation.
0=Disable predrive on KSO pins
1=Enable predrive on KSO pins.
Type
R
RW
Default
-
0
Reset Event
-
nSYSRST
DS00001956D-page 416
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