MEC1404 Datasheet, PDF (270/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
TABLE 16-13: RUNTIME REGISTER BASE ADDRESS TABLE
Block Instance
Port92-Legacy
Instance Number
0
Host
LPC
EC
Address Space
I/O
32-bit address
space
Base Address
0092h
000F_1800h
The Base Address indicates where the first register can be accessed in a particular address space for a block instance.
TABLE 16-14: RUNTIME REGISTER SUMMARY
Offset
0h
Port 92 Register
Register Name (Mnemonic)
16.17.1 PORT 92 REGISTER
Offset ^0h
Bits
Description
Type
7:2 Reserved
R
1 ALT_GATE_A20
R/W
This bit provides an alternate means for system control of the
GATEA20 pin. ALT_A20 low drives GATEA20 low, if A20 from the
keyboard controller is also low. When Port 92 is enabled, writing a
1 to this bit forces ALT_A20 high. ALT_A20 high drives GATEA20
high regardless of the state of A20 from the keyboard controller.
0=ALT_A20 is driven low
1=ALT_A20 is driven high
0 ALT_CPU_RESET
R/W
This bit provides an alternate means to generate a CPU_RESET
pulse. The CPU_RESET output provides a means to reset the sys-
tem CPU to effect a mode switch from Protected Virtual Address
Mode to the Real Address Mode. This provides a faster means of
reset than is provided through the EC keyboard controller. Writing
a “1” to this bit will cause the ALT_RST# internal signal to pulse
(active low) for a minimum of 6s after a delay of 14s. Before
another ALT_RST# pulse can be generated, this bit must be writ-
ten back to “0”.
Default
-
0h
Reset
Event
-
nSIO_
RESET
0h
nSIO_
RESET
DS00001956D-page 270
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