MEC1404 Datasheet, PDF (369/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
26.6 Host Interface
The registers defined for the Tachometer are accessible by the various hosts as indicated in Section 26.11, "EC-Only
Registers".
26.7 Power, Clocks and Reset
This section defines the Power, Clock, and Reset parameters of the block.
26.7.1 POWER DOMAINS
VTR
Name
26.7.2 CLOCK INPUTS
Description
The logic and registers implemented in this block are powered by this
power well.
100kHz_Clk
Name
26.7.3 RESETS
Description
This is the clock input to the tachometer monitor logic. In Mode 1, the
TACHx input is measured in the number of these clocks.
Name
Description
nSYSRST
This signal resets all the registers and logic in this block to their default
state.
26.8 Interrupts
This section defines the Interrupt Sources generated from this block.
Source
Description
TACH
This internal signal is generated from the OR’d result of the status
events, as defined in the TACHx Status Register.
26.9 Low Power Modes
The Tachometer may be put into a low power state by the chip’s Power, Clocks, and Reset (PCR) circuitry.
26.10 Description
The Tachometer block monitors tachometer output signals (also referred to as TACH signals) or locked rotor signals
generated by various types of fans. These signals can be used to determine the speed of the attached fan. This block
is designed to monitor fans at fan speeds from 100 RPMs to 30,000 RPMs.
Typically, these are DC brushless fans that generate (with each revolution) a 50% duty cycle, two-period square wave,
as shown in FIGURE 26-2: below.
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DS00001956D-page 369