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MEC1404 Datasheet, PDF (517/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC
MEC140X/1X
TABLE 43-15: ICSP INTERFACE TIMING PARAMETERS (CONTINUED)
Name
Description
MIN
TYP
tOD
ICSP_DATA output delay after falling edge of
5
TCLK.
tOH
ICSP_DATA hold time after falling edge of TCLK
1 TCLK - tOD
tIS
ICSP_DATA input setup time before falling edge of
5
TCLK.
tIH
ICSP_DATA hold time after falling edge of TCLK.
5
MAX
10
Units
nsec
nsec
nsec
nsec
Note: fclk is the maximum frequency to access ICSP accessible test registers.
43.15 Test Port - XNOR
XNOR test mode is entered and exiting via the ICSP test port. Therefore, XNOR test mode must abide by the ICSP
timing.
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DS00001956D-page 517