MEC1404 Datasheet, PDF (361/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
Offset ^18h
Bits
Description
1 STATUS_ENABLE_FLOW_CONTROL_ERROR
This is an interrupt enable for DMA Channel Interrupt:Status
Flow Control Error.
1=Enable Interrupt
0=Disable Interrupt
0 STATUS_ENABLE_BUS_ERROR
This is an interrupt enable for DMA Channel Interrupt:Status
Bus Error.
1=Enable Interrupt
0=Disable Interrupt
Type
R/W
Default
0h
Reset
Event
DMA_
RESET
R/W
0h
DMA_
RESET
24.11.8 DMA CHANNEL N CRC ENABLE REGISTER
Offset ^20h
Bits
Description
Type
31:2 Reserved
R
1 CRC_POST_TRANSFER_ENABLE
R/W
The bit enables the transfer of the calculated CRC-32 after the
completion of the DMA transaction. If the DMA transaction is
aborted by either firmware or an internal bus error, the transfer will
not occur. If the target of the DMA transfer is a device and the
device signaled the termination of the DMA transaction, the CRC
post transfer will not occur.
1=Enable the transfer of CRC-32 for DMA Channel N after the DMA
transaction completes
0=Disable the automatic transfer of the CRC
0 CRC_ENABLE
R/W
1=Enable the calculation of CRC-32 for DMA Channel N
0=Disable the calculation of CRC-32 for DMA Channel N
Default
-
0h
Reset
Event
-
DMA_
RESET
0h
DMA_
RESET
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DS00001956D-page 361