MEC1404 Datasheet, PDF (485/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

• Ground Pins (VSS, AVSS, VSS_VBAT)
• Voltage Regulator Capacitor (VR_CAP)
• Crystal pins (XTAL1, XTAL2)
• Test Output Pin (XNOR_OUT): GPIO027/KSO00/PVT_IO1
• Pins (ICSP_MCLR)
FIGURE 41-2:
XNOR CHAIN TEST STRUCTURE
MEC140X/1X
I/O#1
I/O#2
I/O#3
I/O#n
XNOR
Out
41.5.3 TEST PROCEDURE
41.5.3.1 Setup
Warning: Ensure power supply is off during Setup.
1. Connect ICSP_MCLR to ground.
2. Connect the VSS, AVSS, VSS_VBAT pins to ground.
3. Connect the VTR, VTR_33_18, VBAT pins to an unpowered 3.3V power source.
4. Connect the VREF_CPU pin to an unpowered 1.8V power source.
5. Connect an oscilloscope or voltmeter to the Test Output pin.
6. All other pins should be tied to ground.
Note: There are 107 pins in the XNOR Chain in the 128-pin package.
41.5.3.2 Testing
1. Turn on the 3.3V power source.
2. Enable the XNOR Chain as defined in Section 38.5.3.3, "Procedure to Enable the XNOR Chain".
Note:
Note that at this point all inputs to the XNOR Chain are low, except for the ICSP_MCLR pin, and the output
on the Test Output pin is non-inverted from its initial state, which is dependent on the number of pins in the
chain. If the number of input pins in the chain is an even number, the initial state of the Test Output Pin
(XNOR_OUT): GPIO027/KSO00/PVT_IO1 is low. If the number of input pins in the chain is an odd number,
the initial state of the Test Output Pin (XNOR_OUT): GPIO027/KSO00/PVT_IO1 is high.
3. Bring one pin in the chain high. The output on the Test Output Pin (XNOR_OUT): GPIO027/KSO00/PVT_IO1
pin should toggle. Then individually toggle each of the remaining pins in the chain. Each time an input pin is tog-
gled either high or low the Test Output Pin (XNOR_OUT): GPIO027/KSO00/PVT_IO1 pin should toggle.
4. Once the XNOR test is completed, exit the XNOR Chain Test Mode by cycling VTR power.
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DS00001956D-page 485