MEC1404 Datasheet, PDF (197/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
11.8.2 WDT CONTROL REGISTER
Offset ^04h
Bits
Description
Type
7:5 RESERVED
R
4 WDT_STALL_EN[2]
R/W
This bit is used to enable Bit[2] of the WDT_Stall[2:0] input bus.
For a description of the stall feature see EC-Only Registers on
page 196.
0= EC-Only Registers not enabled on WDT_Stall[2]
1= EC-Only Registers enabled on WDT_Stall[2]
3 WDT_STALL_EN[1]
R/W
This bit is used to enable Bit[1] of the WDT_Stall[2:0] input bus.
For a description of the stall feature see EC-Only Registers on
page 196.
0= EC-Only Registers not enabled on WDT_Stall[1]
1= EC-Only Registers enabled on WDT_Stall[1]
2 WDT_STALL_EN[0]
R/W
This bit is used to enable Bit[0] of the WDT_Stall[2:0] input bus.
For a description of the stall feature see EC-Only Registers on
page 196.
0= EC-Only Registers not enabled on WDT_Stall[0]
1= EC-Only Registers enabled on WDT_Stall[0]
1 WDT Status
WDT_RST is set by hardware if the last reset of MEC140X/1X was
caused by an underflow of the WDT. See Section 11.7.1.3, "WDT
Reload Mechanism," on page 195 for more information.
R/WC
This bit must be cleared by the EC firmware writing a ‘1’ to this bit.
Writing a ‘0’ to this bit has no effect.
0 WDT Enable
R/W
In WDT Operation, the WDT is activated by the sequence of opera-
tions defined in Section 11.7.1.1, "WDT Activation Mechanism" and
deactivated by the sequence of operations defined in Section
11.7.1.2, "WDT Deactivation Mechanism".
0 = block disabled
1 = block enabled
Note: The default of the WDT is inactive.
Default
-
0b
Reset
Event
-
nSYSR
ST
0b
nSYSR
ST
0b
nSYSR
ST
0b
nSYSR
ST
0b
nSYSR
ST
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DS00001956D-page 197