MEC1404 Datasheet, PDF (2/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
- Week Alarm Event only generated when Sys-
tem Power is Available
- Power-up Event
- Week Alarm Interrupt with 1 Second to 8.5 Year
Time-out
- Sub-Week Alarm Interrupt with 0.50 Seconds -
72.67 hours time-out
- 1 Second and Sub-second Interrupts
• Battery-Powered General Purpose Output (BGPO)
• VBAT-Powered Control Interface (VCI)
- 2 Active-low VCI Inputs
- 1 Active-high VCI Input
- 1 Active-high VCI Output Pin
- Optional filter and latching
• Power-Fail Status Register
• Port 80 BIOS Debug Port
- Two Ports, Assignable to Any LPC IO Address
- 24-bit Timestamp with Adjustable Timebase
- 16-Entry FIFO
• PECI Interface 3.0
• Two Programmable Comparators
- 8 Bit Resolution
- Independent Outputs per Comparator
- Option to Use Pin or Programmable Voltage Ref-
erence Input
- Can be used for Thermistor Voltage Sensing
• Integrated Standby Power Reset Generator
• XNOR Test Mode
Product Dependent Features
• Enhanced Serial Peripheral Interface (eSPI)
- Intel eSPI Specification compliant
- Supports four channels/interfaces:
- Peripheral channel Interface
- Virtual Wire Interface
- Out of Band Channel Interface
- Flash Channel Interface
- Supports EC Bus Master to Host Memory
• Internal Memory
- Boot ROM
- 32 kB Data Optimized SRAM
- Code Optimized SRAM Options from 96 kB to
160 kB
- 64 Bytes Battery Powered SRAM
• Keyboard Matrix Scan Controller
- Supports 18x8 Matrix
- Pre-Drive Mode Supported
• Up To Three EC-based SMBus 2.0 Host Controllers
- Allows Master or Dual Slave Operation
- Controllers are Fully Operational on Standby
Power
- I²C Datalink Compatibility Mode
- Multi-Master Capable
- Supports Clock Stretching
- Programmable Bus Speeds
- 1 MHz Capable
- SMBus Time-outs Interface
- Up to 6 Port Flexible Multiplexing
- Up to 5 ports with 1.8V or 3.3V Configurable
Input Threshold
- 1 port with VTT level signaling (i.e., AMD SB-
TSI Port)
- Supports DMA Network Layer
• Up To Two PS/2 Controllers
- Independent Hardware Driven PS/2 Ports
- Fully functional on Main and/or Suspend Power
- PS/2 Edge Wake Capable
- 3.6V Tolerant I/O Suitable for Internal Board
Routing
• General Purpose I/O Pins
- Inputs
- Asynchronous rising and falling edge wakeup
detection Interrupt High or Low Level
- Outputs:
- Push Pull or Open Drain output
- Programmable power well emulation
- Pull up or pull down resistor control
- Automatically disabling pull-up resistors when
output driven low
- Automatically disabling pull-down resistors
when output driven high
- Group- or individual control of GPIO data.
• Up To Three LEDs
- Programmable Blink Rates
- Piecewise Linear Breathing LED Output Control-
ler
- Provides for programmable rise and fall
waveforms
- Operational in EC Sleep States
• One Serial Peripheral Interface (SPI) Controller
- Master Only SPI Controller
- Mappable to three ports (only 1 port active at a
time)
- 1 shared SPI Interface.
- 1 General Purpose SPI Interface (package
dependent)
- 1 Crisis recovery SPI Interface (located on
Keyboard Matrix Scan connector)
- Dual and Quad I/O Support
DS00001956D-page 2
 2015 - 2016 Microchip Technology Inc.