MEC1404 Datasheet, PDF (174/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
TABLE 10-2: INTERRUPT SOURCE, ENABLE SET, ENABLE CLEAR, AND RESULT BIT
ASSIGNMENTS (CONTINUED)
Aggreg Aggrega
ator IRQ tor Bit
HWB Instance Name
Interrupt Event
Wake
Event
Source Description
GIRQ18
0
Quad Master SPI Control-
QMSPI_INT
ler
No Master SPI Controller Requires
Servicing
GIRQ19
0
eSPI_Slave
INTR_PC
No Peripheral Channel Interrupt
GIRQ19
1
eSPI_Slave
INTR_BM1
No Bus Mastering Channel 1 Inter-
rupt
GIRQ19
2
eSPI_Slave
INTR_BM2
No Bus Mastering Channel 2 Inter-
rupt
GIRQ19
3
eSPI_Slave
INTR_LTR
No Peripheral Message (LTR)
Interrupt
GIRQ19
4
eSPI_Slave
INTR_OOB_UP
No Out of Band Channel Up Inter-
rupt
GIRQ19
5
eSPI_Slave
INTR_OOB_DOWN
No Out of Band Channel Down
Interrupt
GIRQ19
6
eSPI_Slave
INTR_FLASH
No Flash Channel Interrupt
GIRQ19
7
eSPI_Slave
eSPI_RESET
No eSPI_RESET
GIRQ19
8
MCHP Reserved
MCHP Reserved
-
-
GIRQ20
0
GIRQ20
1
GIRQ20
2
GIRQ20
3
BC-Link 0 Master
BC-Link 0 Master
BC-Link 0 Master
BC-Link 1 Master
BCM_BUSY_CLR
BCM_ERR
BCM_INT
BCM_BUSY_CLR
No BC-Link Busy Clear Flag
No BC-Link Error Flag Interrupt
Yes BC-Link Companion Interrupt
Event
No BC-Link Busy Clear Flag
GIRQ20
4
BC-Link 1 Master
BCM_ERR
No BC-Link Error Flag Interrupt
GIRQ20
5
GIRQ21 0-2
BC-Link 1 Master
Test
BCM_INT
Test
Yes BC-Link Companion Interrupt
Event
-
-
GIRQ22
0
GIRQ22
1
GIRQ22
2
GIRQ22
3
GIRQ22
4
GIRQ22
5
GIRQ22
6
LPC Interface
LPC_WAKE_ONLY
Yes Wake-Only Event (No Inter-
rupt Generated) - LPC Traffic
Detected
SMBus Controller 0
SMB_WAKE_ONLY
Yes Wake-Only Event (No Inter-
rupt Generated) - SMBus.0
START Detected
SMBus Controller 1
SMB_WAKE_ONLY
Yes Wake-Only Event (No Inter-
rupt Generated) - SMBus.1
START Detected
SMBus Controller 2
SMB_WAKE_ONLY
Yes Wake-Only Event (No Inter-
rupt Generated) - SMBus.2
START Detected
PS2 Device Interface 0
PS2_-
Yes Wake-Only Event (No Inter-
DAT0_WAKE_ONLY
rupt Generated) - PS/2.0 Start
Bit Detected
PS2 Device Interface 1A
PS2_-
Yes Wake-Only Event (No Inter-
DAT1A_WAKE_ONL
rupt Generated) - PS/2.1A
Y
Start Bit Detected
PS2 Device Interface 1B
PS2_-
Yes Wake-Only Event (No Inter-
DAT1B_WAKE_ONL
rupt Generated) - PS/2.1B
Y
Start Bit Detected
DS00001956D-page 174
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