MEC1404 Datasheet, PDF (105/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
CLKRUN# Support for Serial IRQ Cycle
If a logical device asserts or de-asserts an interrupt and CLKRUN# is sampled “high”, the LPC Controller can request
the restoration of the clock by asserting the CLKRUN# signal asynchronously (TABLE 4-6:). The LPC Controller holds
CLKRUN# low until it detects two rising edges of the clock. After the second clock edge, the controller must disable the
open drain driver (FIGURE 4-3:).
The LPC Controller must not assert CLKRUN# if it is already driven low by the central resource; i.e., the PCI CLOCK
GENERATOR in FIGURE 4-2:. The controller will not assert CLKRUN# under any conditions if the Serial IRQs are dis-
abled.
The LPC Controller must not assert CLKRUN# unless the line has been de-asserted for two successive clocks; i.e.,
before the clock was stopped (FIGURE 4-3:).
The LPC Controller will not assert CLKRUN# if it is already driven low by the central resource; i.e., the PCI CLOCK
GENERATOR. The LPC Controller also will not assert CLKRUN# unless the signal has been de-asserted for two suc-
cessive clocks; i.e., before the clock was stopped.
TABLE 4-6: LPC CONTROLLER CLKRUN# FUNCTION
SIRQ_MODE
0
1
Internal Interrupt
Or DMA Request
X
NO CHANGE
CHANGE(Note 4-6)
CLKRUN#
X
X
0
1
Action
None
None
None
Assert CLKRUN#
Note 4-5
Note 4-6
SIRQ_MODE is defined in Section 4.8.4.1, "Enabling SERIRQ Function," on page 112.
“Change” means either-edge change on any or all parallel IRQs routed to the Serial IRQ block. The
“change” detection logic must run asynchronously to LCLK and regardless of the Serial IRQ mode;
i.e., “continuous” or “quiet”.
FIGURE 4-2:
CLKRUN# SYSTEM IMPLEMENTATION EXAMPLE
Master
Target
MCHP
Device
LCLK
CLKRUN#
PCI CLOCK
GENERATOR
(Central Resource)
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