MEC1404 Datasheet, PDF (130/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
4.11.5 I/O BAR INHIBIT REGISTER
Offset ^20h
Bits
Description
Type
63:0 BAR_Inhibit[63:0]
R/W
When bit Di of BAR_Inhibit is 1, the BAR for Logical Device i is dis-
abled and its addresses will not be claimed on the LPC bus, inde-
pendent of the value of the Valid bit in the BAR.The association
between bits in BAR_Inhibit and Logical Devices is illustrated in
Table 4-20, "BAR Inhibit Device Map".
Default
0h
Reset
Event
nSYSR
ST
TABLE 4-20: BAR INHIBIT DEVICE MAP
Bar Inhibit Bit
0
1
.
.
.
31
Logical Device Number
0h
1h
.
.
.
31h
4.11.6 LPC BAR INIT REGISTER
Offset ^30h
Bits
Description
15:0 BAR_Init
This field is loaded into the LPC BAR at offset 60h on nSIO_RE-
SET.
Type
R/W
Default
002Eh
Reset
Event
nSIO_
RESET
DS00001956D-page 130
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