MEC1404 Datasheet, PDF (293/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

18.5.1 POWER DOMAINS
VTR
Name
18.5.2 CLOCK INPUTS
Name
48 MHz Ring Oscillator
18.5.3 RESETS
nSYSRST
Soft Reset
Name
Timer_Reset
18.6 Interrupts
MEC140X/1X
Description
The timer control logic and registers are all implemented on this single
power domain.
Description
This is the clock source to the timer logic. The Pre-scaler may be used
to adjust the minimum resolution per bit of the counter.
Description
This reset signal, which is an input to this block, resets all the logic and
registers to their initial default state.
This reset signal, which is created by this block, resets all the logic and
registers to their initial default state. This reset is generated by the block
when the SOFT_RESET bit is set in the Timer Control Register register.
This reset signal, which is created by this block, is asserted when either
the nSYSRST or the Soft Reset signal is asserted. The nSYSRST and
Soft Reset signals are OR’d together to create this signal.
Source
Description
Timer_Event
This interrupt event fires when a 16-bit timer x reaches its limit. This
event is sourced by the EVENT_INTERRUPT status bit if enabled.
18.7 Low Power Modes
The Basic Timer may be put into a low power state by the chip’s Power, Clocks, and Reset (PCR) circuitry. This block
is only be permitted to enter low power modes when the block is not active.
The sleep state of this timer is as follows:
• Asleep while the block is not Enabled
• Asleep while the block is not running (start inactive).
• Asleep while the block is halted (even if running).
The block is active while start is active.
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DS00001956D-page 293