MEC1404 Datasheet, PDF (14/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
Note
Note 16
Note 17
Description
If the eSPI Flash Channel is used for booting, the GPIO123/SHD_CS# pin must be used as
RSMRST#. This pin will be driven high by the boot ROM code in order to activate the eSPI
flash channel. If the SHD_SPI port is used for booting, then any unused GPIO may be used for
RSMRST#.
If the eSPI Flash Channel is used for booting, the GPIO135/SHD_IO2 pin must be used to
determine that the primary power rails are stable before RSMRST# can be de-asserted. See
the MEC140X/1X eSPI Addendum document for more details.
2.4 Pin Lists
Note:
The GPIO Pin Control registers for the Pads that are not bonded out to pins or balls in the smaller package
have been defaulted to their inactive state and are read-only. These pins cannot be modified by the down-
loaded firmware located in SRAM. No special handling required.
128-pin VTQFP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
144-pin WFBGA
L10
N13
M12
M10
G5
M13
L12
K11
J11
G9
J7
H12
H8
L11
H11
J12
C9
F1
H5
G11
H13
G12
G13
F12
F11
E11
F13
E12
D12
MEC1403/04
Pin Name
GPIO157/LED0/TST_CLK_OUT
GPIO027/KSO00/PVT_IO1
GPIO001/SPI_CS#/32KHZ_OUT
GPIO002/PWM7
VTR
GPIO005/SMB00_DATA/SMB00_DATA18/KSI2
GPIO006/SMB00_CLK/SMB00_CLK18/KSI3
GPIO007/SMB01_DATA/SMB01_DATA18
GPIO010/SMB01_CLK/SMB01_CLK18
GPIO011/nSMI/nEMI_INT
GPIO012/SMB02_DATA/SMB02_DATA18
GPIO013/SMB02_CLK/SMB02_CLK18
nRESET_IN/GPIO014
GPIO015/KSO01/PVT_CS#
GPIO016/KSO02/PVT_SCLK
GPIO017/KSO03/PVT_IO0
VSS
VR_CAP
VTR
GPIO020/CMP_VIN0
GPIO021/CMP_VIN1
DAC_VREF
GPIO160/DAC_0
GPIO161/DAC_1
GPIO165/CMP_VREF0
GPIO166/CMP_VREF1/UART_CLK
GPIO123/SHD_CS#
GPIO133/SHD_IO0
GPIO134/SHD_IO1
DS00001956D-page 14
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