MEC1404 Datasheet, PDF (412/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
4. Enable Keyscan Interface (KSEN ='0')
30.10.2.3 De-asserting PREDRIVE_ENABLE
1. Disable Key Scan Interface (KSEN = '1')
2. Program buffer type for all KSO pins to "open-drain”
3. Disable Predrive function (PREDRIVE_ENABLE = '0')
4. Enable Keyscan Interface (KSEN ='0')
30.10.3 INTERRUPT GENERATION
To support interrupt-based processing, an interrupt can optionally be generated on the high-to-low transition on any of
the KSI inputs. A running clock is not required to generate interrupts.
30.10.3.1 Runtime interrupt
KSC_INT is the block’s runtime active-high level interrupt. It is connected to the interrupt interface of the Interrupt Aggre-
gator, which then relays interrupts to the EC.
Associated with each KSI input is a status register bit and an interrupt enable register bit. A status bit is set when the
associated KSI input goes from high to low. If the interrupt enable bit for that input is set, an interrupt is generated. An
Interrupt is de-asserted when the status bit and/or interrupt enable bit is clear. A status bit cleared when written to a ‘1’.
Interrupts from individual KSIs are logically ORed together to drive the KSC_INT output port. Once asserted, an interrupt
is not asserted again until either all KSI[7:0] inputs have returned high or the has changed.
30.10.3.2 Wake-up interrupt
KSC_INT_WAKE is the block’s wakeup interrupt. It is routed to the Interrupt Aggregator.
During sleep mode, i.e., when the bus clock is stopped, a high-to-low transition on any KSI whose interrupt enable bit
is set causes the KSC_INT_WAKE to be asserted. Also set is the associated status bit in the EC Clock Required 2 Status
Register (EC_CLK_REQ2_STS). KSC_WAKEUP_INT remains active until the bus clock is started.
The aforementioned transition on KSI also sets the corresponding status bit in the KSI STATUS Register. If enabled, a
runtime interrupt is also asserted on KSC_INT when the bus clock resumes running.
30.10.4 WAKE PROGRAMMING
Using the Keyboard Scan Interface to ‘wake’ the MEC140X/1X can be accomplished using either the Keyboard Scan
Interface wake interrupt, or using the wake capabilities of the GPIO Interface pins that are multiplexed with the Keyboard
Scan Interface pins. Enabling the Keyboard Scan Interface wake interrupt requires only a single interrupt enable access
and is recommended over using the GPIO Interface for this purpose.
30.11 EC-Only Registers
The registers listed in the EC-Only Register Summary table are for a single instance of the Keyboard Scan Interface.
The addresses of each register listed in this table are defined as a relative offset to the host “Base Address” defined in
the EC-Only Register Base Address Table.
TABLE 30-2: EC-ONLY REGISTER BASE ADDRESS TABLE
Block Instance
Keyboard Scan
Interface
Instance
Number
0
Host
EC
Address Space
32-bit internal
address space
Base Address
0000_9C00h
The Base Address indicates where the first register can be accessed in a particular address space for a block instance.
DS00001956D-page 412
 2015 - 2016 Microchip Technology Inc.