MEC1404 Datasheet, PDF (268/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
Offset ^08h
Bits
Description
Type
2 PCOBFEN
R/W
1= reflects the value written to the PCOBF Register
0=PCOBF reflects the status of writes to the EC2Host Data Register
1 SAEN
R/W
Software-assist enable.
1=This bit allows control of the GATEA20 signal via firmware
0=GATEA20 corresponds to either the last Host-initiated control of
GATEA20 or the firmware write to the Keyboard Control Regis-
ter or the EC AUX Data Register.
0 UD3
R/W
User-defined data. Readable and writable by the EC when written
by the EC at its EC-only alias.
16.15.5 EC AUX DATA REGISTER
Default
0h
Reset
Event
nSYSR
ST
0h
nSYSR
ST
0h
nSYSR
ST
Offset ^0Ch
Bits
Description
Type
7:0 EC_AUX_DATA
W
This 8-bit register is write-only. When written, the C/D in the Key-
board Status Read Register is cleared to ‘0’, signifying data, and
the IBF in the same register is set to ‘1’.
When the Runtime Register at offset 0h is read by the Host, it func-
tions as the EC_HOST Data / AUX Data Register.
16.15.6 PCOBF REGISTER
Default
0h
Reset
Event
nSYSR
ST
Offset ^14h
Bits
Description
Type
7:1 Reserved
R
0 PCOBF
R/W
For a description of this bit, see Section 16.10.1, "PCOBF Descrip-
tion".
Default
-
0h
Reset
Event
-
nSYSR
ST
DS00001956D-page 268
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