MEC1404 Datasheet, PDF (234/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
14.12.5 ACPI OS COMMAND REGISTER
Offset ^04h
Bits
Description
Type
Default
Reset
Event
7:0 ACPI_OSS_COMMAND
W
Writes to the this register are aliased in the OS2EC Data EC Byte 0
Register.
0h
nSYSR
ST
Writes to the this register also set the CMD and IBF bits in the OS
STATUS OS Register
14.12.6 OS STATUS OS REGISTER
This read-only register is aliased to the EC STATUS Register on page 242. the EC STATUS Register on page 242 has
read write access.
Offset
04h
Bits
Description
Type
7 UD0B
R
User Defined
6 SMI_EVT
R
This bit is set when an SMI event is pending; i.e., the ACPI_EC is
requesting an SMI query; This bit is cleared when no SMI events
are pending.
This bit is an ACPI_EC-maintained software flag that is set when
the ACPI_EC has detected an internal event that requires system
management interrupt handler attention. The ACPI_EC sets this
bit before generating an SMI.
Note:
The usage model from the ACPI specification requires
both SMI’s and SCI’s. The ACPI_OS SMI & SCI inter-
rupts are not implemented in the ACPI Embedded
Controller Interface (ACPI-ECI). The SMI_EVT and
SCI_EVT bits in the OS STATUS OS Register are soft-
ware flags and this block do not initiate SMI or SCI
events.
Default
0b
0b
Reset
Event
nSYSR
ST
nSYSR
ST
DS00001956D-page 234
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