MEC1404 Datasheet, PDF (437/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
34.0 EC SUBSYSTEM REGISTERS
34.1 Introduction
This chapter defines a bank of registers associated with the EC Subsystem.
34.2 References
None
34.3 Interface
This block is designed to be accessed internally by the EC via the register interface.
34.4 Power, Clocks and Reset
This section defines the Power, Clock, and Reset parameters of the block.
34.4.1 POWER DOMAINS
Name
Description
VTR
The EC Subsystem Registers are all implemented on this single power
domain.
34.4.2 CLOCK INPUTS
This block does not require any special clock inputs. All register accesses are synchronized to the host clock.
34.4.3 RESETS
Name
Description
VTR_RESET#
nSYSRST
This reset signal, which is an input to this block, resets registers to their
initial default state on a power-on-reset event only.
This reset signal, which is an input to this block, resets registers to their
initial default state any time the embedded controller is reset.
34.5 Interrupts
This block does not generate any interrupt events.
34.6 Low Power Modes
The EC Subsystem Registers may be put into a low power state by the chip’s Power, Clocks, and Reset (PCR) circuitry.
When this block is commanded to sleep it will still allow read/write access to the registers.
34.7 Description
The EC Subsystem Registers block is a block implemented for aggregating miscellaneous registers required by the
Embedded Controller (EC) Subsystem that are not unique to a block implemented in the EC subsystem.
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DS00001956D-page 437