MEC1404 Datasheet, PDF (241/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
EC2OS DATA BYTES[3:0]
Writes by the ACPI_EC to the EC2OS DATA BYTES[3:0] are aliased to the ACPI-OS DATA BYTES[3:0]
All access to the EC2OS DATA BYTES[3:0] registers should be orderly: Least Significant Byte to Most Significant Byte
when byte access is used.
When the FOUR_BYTE_ACCESS bit in the OS Byte Control Register is cleared to ‘0’, the following access rules apply:
1. Writes to the EC2OS Data EC Byte 0 Register set the OBF bit in the OS STATUS OS Register.
2. Reads from the EC2OS DATA BYTES[3:0] have no effect on the IBF bit in the OS STATUS OS Register.
3. All reads from EC2OS DATA BYTES[3:1] return 00h without error.
4. All writes to EC2OS DATA BYTES[3:1] complete without error but the data are not registered.
5. Access to EC2OS DATA BYTES[3:1] have no effect on the IBF & OBF bits in the OS STATUS OS Register.
When the FOUR_BYTE_ACCESS bit in the OS Byte Control Register is set to ‘1’, the following access rules apply:
1. Writes to the EC2OS Data EC Byte 3 Register set the OBF bit in the OS STATUS OS Register.
2. Reads from the EC2OS DATA BYTES[3:0] have no effect on the IBF bit in the OS STATUS OS Register.
14.13.6 EC2OS DATA EC BYTE 1 REGISTER
This register is aliased; see ACPI-OS DATA BYTES[3:0] on page 232, OS2EC DATA BYTES[3:0] on page 239, and
EC2OS DATA BYTES[3:0] on page 241 for detailed description of access rules.
Offset ^101h
Bits
Description
7:0 EC2OS_DATA_BYTE_1
This is byte 1 of the 32-bit EC2OS DATA BYTES[3:0].
Type
R/W
Default
0h
Reset
Event
nSYSR
ST
14.13.7 EC2OS DATA EC BYTE 2 REGISTER
This register is aliased; see ACPI-OS DATA BYTES[3:0] on page 232, OS2EC DATA BYTES[3:0] on page 239, and
EC2OS DATA BYTES[3:0] on page 241 for detailed description of access rules.
Offset ^102h
Bits
Description
7:0 EC2OS_DATA_BYTE_2
This is byte 2 of the 32-bit EC2OS DATA BYTES[3:0].
Type
R/W
Default
0h
Reset
Event
nSYSR
ST
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DS00001956D-page 241