MEC1404 Datasheet, PDF (69/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
Table 3-2, "Voltage Reference Definitions" before removing and replacing the battery. In addition,
upon removing the battery, ground the battery pin before replacing the battery.
APPLICATION NOTE: Battery Circuit Requirement:
• VBAT must always be present if VTR is present.
The following circuit is recommended to fulfill this requirement:
FIGURE 3-1:
RECOMMENDED BATTERY CIRCUIT
To EC as
VTR
3.3V nom,
from AC Source
or Battery Pack
(Schottky Diode)
“RTC” Rail (PCH, System)
VBAT
to EC
3.3V max with
VTR = 0V,
3.6V max with
VTR = VBAT
(Schottky
Diode)
()
Possible
+
Current Limiter
(1K typ.)
3.0V nom
Coin Cell
3.4.2 VOLTAGE REFERENCES
TABLE 3-2: lists the External Voltage References to which the MEC140X/1X provides high impedance interfaces.
TABLE 3-2: VOLTAGE REFERENCE DEFINITIONS
Power Well
Nominal
Input Voltage
VREF_CPU
(Note 3-1,
Note 3-2)
Variable
Scaling
Ratio
n/a
DAC_VREF
Variable
n/a
CMP_VREF0
Variable
n/a
CMP_VREF1
Variable
n/a
ADC_VREF
Variable
n/a
Nominal
Monitored
Voltage
Variable
Variable
Variable
Variable
Variable
Description
Source
Processor Voltage
External Voltage Reference
Used to scale Processor
Interface signals
DAC Reference Voltage
Determines reference volt-
age on the negative termi-
nal of Comparator 0
Determines reference volt-
age on the negative termi-
nal of Comparator 1
ADC Reference Voltage
Pin Interface
Pin Interface
Pin Interface
Pin Interface
Pin Interface
Note 3-1
Note 3-2
For specific electrical characteristics for the voltage reference inputs see Table 42-5, “DC Electrical
Characteristics,” on page 494.
In order to achieve the lowest leakage current when both PECI and SB TSI are not used, set the
VREF_CPU Disable bit to 1. This bit is defined in Section 34.8.5, VREF_CPU DISABLE.
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DS00001956D-page 69