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| MEC1404 Datasheet, PDF (530/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC | |||
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MEC140X/1X
43.22 Serial Debug Port Timing
FIGURE 43-26: SERIAL DEBUG PORT TIMING PARAMETERS
TFDP Clock
tOD
tOH
TFDP Data
tP
fCLK
tCLK-L
tCLK-H
TABLE 43-27: SERIAL DEBUG PORT INTERFACE TIMING PARAMETERS
Name
Description
MIN
TYP
MAX Units
fclk
tP
tOD
tOH
tCLK-L
tCLK-H
TFDP Clock frequency (see note)
TFDP Clock Period.
TFDP Data output delay after falling edge of MSCLK.
TFDP Data hold time after falling edge of TFDP Clock
TFDP Clock Low Time
TFDP Clock high Time (see Note 43-19)
6
-
1/fclk
tP - tOD
tP/2 - 3
tP/2 - 3
24
5
tP/2 + 3
tP/2 + 3
MHz
ïs
nsec
nsec
nsec
nsec
Note 43-19 When the clock divider for the embedded controller is an odd number value greater than 2h, then
tCLK-L = tCLK-H + 15 ns. When the clock divider for the embedded controller is 0h, 1h, or an even
number value greater than 2h, then tCLK-L = tCLK-H.
DS00001956D-page 530
ï£ 2015 - 2016 Microchip Technology Inc.
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