MEC1404 Datasheet, PDF (236/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
Offset
04h
Bits
Description
Type
1 IBF
R
The Input Buffer Full bit is set to indicate that a the ACPI_OS has
written a command or data to the ACPI_EC and that data is ready.
This bit is automatically cleared when data has been read by the
ACPI_EC.
Note:
The setting and clearing of this IBF varies depending
on the setting of the following bits: CMD bit in this reg-
ister and FOUR_BYTE_ACCESS bit in the OS Byte
Control Register. Three scenarios follow:
1. The IBF is set when the ACPI_OS writes to the ACPI OS
COMMAND Register. This same write autonomously sets
the CMD bit in this register.
The IBF is cleared if the CMD bit in this register is set and the
ACPI_EC reads from the OS2EC Data EC Byte 0 Register.
Note:
When CMD bit in this register is set the FOUR_BYTE_-
ACCESS bit in the OS Byte Control Register has no
impact on the IBF bit behavior.
2. A write by the to the ACPI_OS to the ACPI OS Data Register
Byte 0 Register sets the IBF bit if the FOUR_BYTE_AC-
CESS bit in the OS Byte Control Register is in the cleared to
‘0’ state prior to this write. This same write autonomously
clears the CMD bit in this register.
A read of the OS2EC Data EC Byte 0 Register clears the IBF bit if
the FOUR_BYTE_ACCESS bit in the OS Byte Control Register is
in the cleared to ‘0’ state prior to this read.
3. A write by the to the ACPI_OS to the ACPI OS Data Register
Byte 3 Register sets the IBF bit if the FOUR_BYTE_AC-
CESS bit in the OS Byte Control Register is in the set to ‘1’
state prior to this write. This same write autonomously
clears the CMD bit in this register.
A read of the OS2EC Data EC Byte 3 Register clears the IBF bit if
the FOUR_BYTE_ACCESS bit in the OS Byte Control Register is
in the set to ‘1’ state prior to this read.
An IBF interrupt signals the ACPI_EC that there is data available.
The ACPI Specification usage model is as follows:
1. The ACPI_EC reads the EC STATUS Register and sees the
IBF flag set,
2. The ACPI_EC reads all the data available in the OS2EC
DATA BYTES[3:0]. This causes the IBF bit to be automati-
cally cleared by hardware.
3. The ACPI_EC must then generate a software interrupt (See
Note: on page 227) to alert the ACPI_OS that the data has
been read and that the host is free to write more data to the
ACPI_EC as needed.
Default
0h
Reset
Event
nSYSR
ST
DS00001956D-page 236
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