MEC1404 Datasheet, PDF (134/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
TABLE 6-1: SIGNAL DESCRIPTION TABLE (CONTINUED)
Name
SPI_IO0
SPI_IO1
SPI_IO2
SPI_IO3
Direction
Input/Output
Input/Output
Input/Output
Input/Output
Description
SPI Data pin 0. Also used as SPI_MOSI, Master-Out/Slave-In
when the interface is used in Single wire mode
SPI Data pin 1. Also used as SPI_MISO, Master-In/Slave-Out
when the interface is used in Single wire mode
SPI Data pin 2 when the SPI interface is used in Quad Mode. Also
can be used by firmware as WP.
SPI Data pin 3 when the SPI interface is used in Quad Mode. Also
can be used by firmware as HOLD.
6.6 Host Interface
The registers defined for the General Purpose Serial Peripheral Interface are accessible by the various hosts as indi-
cated in Section 6.11, "EC-Only Registers".
6.7 Power, Clocks and Reset
This section defines the Power, Clock, and Reset parameters of the block.
6.7.1 POWER
VTR
Name
6.7.2 CLOCKS
Description
The logic and registers implemented in this block are powered by this
power well.
Name
48 MHz Ring Oscillator
6.7.3 RESETS
Description
This is a clock source for the SPI clock generator.
nSYSRST
RESET
Name
Description
This signal resets all the registers and logic in this block to their default
state.QMSPI Status Register
This reset is generated if either the nSYSRST is asserted or the
SOFT_RESET is asserted.
DS00001956D-page 134
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