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MEC1404 Datasheet, PDF (7/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC
MEC140X/1X
• GPIO061 Pin Control Register = 0x1000;
//ALT FUNC1 – LPC_PD_N
• GPIO063 Pin Control Register = 0x1000;
//ALT FUNC1 – SER_IRQ
• GPIO064 Pin Control Register = 0x1000;
//ALT FUNC1 – PCI_RESET
• GPIO067 Pin Control Register = 0x1000;
//ALT FUNC1 – CLKRUN
• LPC Interface (Configuration Port) BAR = 0x002E_8C01; //set bit 15
• LPC Activate Register = 0x01;
1.2.2 CONFIGURE ESPI INTERFACE
The downloaded firmware must configure the GPIO Pin Control registers for the eSPI alternate function, configure the
eSPI I/O Component (Configuration Port) Base Address Register (BAR), and activate the eSPI block.
Example:
• GPIO034 Pin Control Register = 0x2000;
//ALT FUNC2 – ESPI_CLK
• GPIO044 Pin Control Register = 0x2000;
//ALT FUNC2 – ESPI_CS#
• GPIO040 Pin Control Register = 0x2000;
//ALT FUNC2 – ESPI_IO0
• GPIO041 Pin Control Register = 0x2000;
//ALT FUNC2 – ESPI_IO1
• GPIO042 Pin Control Register = 0x2000;
//ALT FUNC2 – ESPI_IO2
• GPIO043 Pin Control Register = 0x2000;
//ALT FUNC2 – ESPI_IO3
• GPIO063 Pin Control Register = 0x2000;
//ALT FUNC2 – ESPI_ALERT#
• GPIO061 Pin Control Register = 0x2000;
//ALT FUNC2 – ESPI_RESET#
• eSPI I/O Component (Configuration Port) BAR = 0x002E_0001; //set bit 15
• eSPI Activate Register = 0x01;
1.2.3 CONFIGURE I2C INTERFACE
Similar to the LPC and eSPI interfaces, the downloaded firmware must configure the GPIO Pin Control registers for the
SMBus alternate function and activate the associated SMB/I2C Controller.
1.3 Initialize Peripheral Interfaces
This will be system dependent, however, this section outlines some recommendations when enabling certain interfaces.
1.3.1 KEYBOARD SCAN INTERFACE
The Keyboard Scan Interface has been multiplexed onto GPIO pins. Internal pull-up resistors, enabled via the GPIO Pin
Control Registers", may be used on the KSI and KSO pins instead of external pull-ups. However, if internal pull-ups are
used then the PreDrive Mode must be enabled. The GPIO Pin Control register format is defined in Section 22.6.1.1,
"Pin Control Register," on page 335. The PreDrive Mode is defined in Section 30.10.2, "PreDrive Mode," on page 411.
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