MEC1404 Datasheet, PDF (521/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
43.17.5 LPC I/O TIMING
FIGURE 43-18: I/O WRITE
LCLK
LFRAME#
LAD[3:0]#
L1 L2
Address
Data
Note: L1=Start; L2=CYCTYP+DIR; L3=Sync of 0000
TAR
Sync=0110
L3 TAR
FIGURE 43-19: I/O READ
LCLK
LFRAME#
LAD[3:0]#
L1 L2
Address
TAR
Sync=0110
L3 Data
TAR
Note: L1=Start; L2=CYCTYP+DIR; L3=Sync of 0000
43.17.6 SERIAL IRQ TIMING
FIGURE 43-20: SETUP AND HOLD TIME
LCLK
SER _ IR Q
t1
t2
TABLE 43-21: SETUP AND HOLD TIME
Name
t1
t2
Description
SER_IRQ Setup Time to LCLK Rising
SER_IRQ Hold Time to LCLK Rising
MIN TYP
7
0
MAX
Units
nsec
43.17.7 NEC_SCI TIMING
nEC_SCI pin has the same minimum timing requirements as GPIO signals. See Section 43.5, "GPIO Timings," on
page 509.
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