MEC1404 Datasheet, PDF (377/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
27.5 Signal Description
TABLE 27-1: SIGNAL DESCRIPTION TABLE
Name
PWM_OUTPUT
Direction
OUTPUT
Description
Pulse Width Modulated signal to PWMx pin.
27.6 Host Interface
The registers defined for the PWM Interface are accessible by the various hosts as indicated in Section 27.11, "EC-Only
Registers".
27.7 Power, Clocks and Reset
This section defines the Power, Clock, and Reset parameters of the block.
27.7.1 POWER DOMAINS
VTR
27.7.2
Name
CLOCK INPUTS
Description
The PWM logic and registers are powered by this single power source.
100kHz_Clk
Name
48 MHz Ring Oscillator
27.7.3 RESETS
Description
100kHz_Clk clock input for generating low PWM frequencies, such as
10 Hz to 100 Hz.
48 MHz Ring Oscillator clock input for generating high PWM
frequencies, such as 15 kHz to 30 kHz.
nSYSRST
Name
Description
This reset signal resets all the logic in this block to its initial state
including the registers, which are set to their defined default state.
27.8 Interrupts
The PWM block does not generate any interrupt events.
27.9 Low Power Modes
The PWM may be put into a low power state by the chip’s Power, Clocks, and Reset (PCR) circuitry. When the PWM is
in the sleep state, the internal counters reset to 0 and the internal state of the PWM and the PWM_OUTPUT signal set
to the OFF state.
27.10 Description
The PWM_OUTPUT signal is used to generate a duty cycle of specified frequency. This block can be programmed so
that the PWM signal toggles the PWM_OUTPUT, holds it high, or holds it low. When the PWM is configured to toggle,
the PWM_OUTPUT alternates from high to low at the rate specified in the PWMx Counter ON Time Register and PWMx
Counter OFF Time Register.
 2015 - 2016 Microchip Technology Inc.
DS00001956D-page 377