MEC1404 Datasheet, PDF (261/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
FIGURE 16-5:
CPU_RESET IMPLEMENTATION DIAGRAM
14 s
6 s
FE Command
(From KRESET
Speed-up Logic)
Port 92 Reg (D0)
Pulse
Generator
KRESET
SAEN
ENAB P92
Pulse
Generator
ALT_RST#
14 s
6 s
CPU_RESET
16.12 Instance Description
There are two blocks defined in this chapter: Emulated 8042 Interface and the Legacy Port92/GATEA20 Support. The
MEC140X/1X has one instance of each block.
16.13 Configuration Registers
The registers listed in the Configuration Register Summary table are for a single instance of the Emulated 8042 Inter-
face. The addresses of each register listed in this table are defined as a relative offset to the host “Base Address” defined
in the Configuration Register Base Address Table.
TABLE 16-5: CONFIGURATION REGISTER BASE ADDRESS TABLE
Block Instance
Emulated 8042
Interface
Instance
Number
0
Logical
Device
Number
1
Host
LPC
EC
Address Space
Configuration Port
32-bit internal
address space
Base Address
INDEX = 00h
000F_0700h
Each Configuration register access through the Host Access Port is via its LDN and its Host Access Port Index. EC
access is a relative offset to the EC Base Address.
TABLE 16-6: CONFIGURATION REGISTER SUMMARY
Offset
30h
Register Name (Mnemonic)
Activate Register
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DS00001956D-page 261