MEC1404 Datasheet, PDF (482/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
41.4.4.6 MCHP_CMD <0x07>
Offset ^01h
Bits
Description
Type
7:0 MCHP_CMD
R/W
Microchip Command Register supports the following commands.
• Command 0x00: Read Status
Bit [7] Boot Into User Code Status (read-only)
0=Boot ROM will boot normally following a AssertDeviceRe-
set command
1=Boot ROM will stall after setting the Boot Ready status bit
allowing the ICSP debugger to load code into SRAM follow-
ing a AssertDeviceReset command.
Bit [6] BRDY; Boot Ready (read-only)
0 = eJTAG access is not enabled.
1 = Boot ROM is done initializing the device and has enabled
eJTAG interface. This bit is cleared by H/W on nSYSRST.
Bit [5:4] RESERVED
Bit [3] CFGRDY; Configuration Ready (read-only)
0 = MTAP Device ID Not Valid
1 = MTAP Device ID Valid.
Bit [2] RESERVED
Bit [1] SLEEPING
0 = 48 MHz Ring Oscillator is running
1 = The device is sleeping. 48 MHz Ring Oscillator is not run-
ning
Bit [0] DEVRST; Device Reset Status (read-only)
0 = MTAP Device Reset is deasserted
1 = MTAP Device Reset is asserted
Note: The MTAP Device Reset is equivalent to a VTR POR,
except the MTAP registers are not reset.
Default
0h
Reset
Event
JTAG_
RST#
DS00001956D-page 482
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