MEC1404 Datasheet, PDF (252/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
15.11.9 EC_PM_STS REGISTER
Offset
Bits
7:1 UD
Description
0 EC_SCI_STS
If the EC_SCI_STS bit is “1”, an interrupt is generated on the
EC_SCI# pin.
Type
R/W
R/W
Default
00h
00h
Reset
Event
nSYSR
ST
nSYSR
ST
Note: These bits are only accessed by the EC. There is no host access to this register.
15.12 EC-Only Registers
The registers listed in the EC-Only Register Summary table are for a single instance of the ACPI PM1 interface. The
addresses of each register listed in this table are defined as a relative offset to the host “Base Address” defined in the
EC-Only Register Base Address Table.
TABLE 15-5: EC-ONLY REGISTER BASE ADDRESS TABLE
Block Instance
Instance Number
Host
Address Space
Base Address
ACPI PM1 Interface
0
EC
32-bit address
000F_1500h
space
The Base Address indicates where the first register can be accessed in a particular address space for a block instance.
TABLE 15-6:
Offset
00h
01h
02h
03h
04h
05h
06h
07h
10h
EC-ONLY REGISTERS SUMMARY
Register Name
Power Management 1 Status 1 Register
Power Management 1 Status 2 Register
Power Management 1 Enable 1 Register
Power Management 1 Enable 2 Register
Power Management 1 Control 1 Register
Power Management 1 Control 2 Register
Power Management 2 Control 1 Register
Power Management 2 Control 2 Register
EC_PM_STS Register
Note: The Power Management Status, Enable and Control registers in Table 15-6, "EC-Only Registers Sum-
mary" are described in Section 15.11, "Runtime Registers," on page 247.
DS00001956D-page 252
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