MEC1404 Datasheet, PDF (454/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
In order to minimize power drain on the VBAT circuit, the edge detection logic operates only when the input buffer for a
VCI_IN# pin is enabled. The input buffer is enabled either when the VCI_IN# pin is configured to determine the
VCI_OUT pin, as controlled by the VCI_IN[1:0]# field of the VCI Register, or when the input buffer is explicitly enabled
in the VCI Input Enable Register. When the pins are not enabled transitions on the pins are ignored.
The VCI_OVRD input also has an Input Buffer Enable and an Input Enable bit associated with VCI_OUT. However, the
VCI_OVRD input does not have any filtering, latching, input edge detection or polarity control.
37.8.3 VCI PIN MULTIPLEXING
Each of the VCI inputs, as well as VCI_OUT, are multiplexed with standard VTR-powered GPIOs. When VTR power is
off, the mux control is disabled and the pin always reverts to the VCI function. The VCI_IN# function should be disabled
in the VCI Input Enable Register for any pin that is intended to be used as a GPIO rather than a VCI_IN#, so that
VCI_OUT is not affected by the state of the pin. The VCI_OVRD_IN function should similarly be disabled if the pin is to
be used as a GPIO.
37.8.4 APPLICATION EXAMPLE
For this example, a mobile platform configures the VBAT-Powered Control Interface as follows:
• VCI_IN0# is wired to a power button on the mobile platform
• VCI_IN1# is wired to a power button on a dock
• VCI_OVRD_IN is wired so that it is asserted whenever AC power is present
• The VCI_OUT pin is connected to the regulator that sources the VTR power rail, the rail which powers the EC
The VBAT-Powered Control Interface can be used in a system as follows:
1. In the initial condition, there is no power on either the VTR or VBAT power rails. All registers in the VBAT-Powered
Control Interface are in an indeterminate state
2. A coin cell battery is installed, causing a VBAT_POR. All registers in the interface are forced to their default con-
ditions. The VCI_OUT pin is driven by hardware, input filters on the VCI_IN# pins are enabled, the VCI_IN# pins
are all active low, all VCI inputs are enabled and all edge and status latches are in their non-asserted state
3. The power button on VCI_IN0# is pushed. This causes VCI_OUT to be asserted, powering the VTR rail. This
causes the EC to boot and start executing EC firmware
4. The EC changes the VCI configuration so that firmware controls the VCI_OUT pin, and sets the output control
so that VCI_OUT is driven high. With this change, the power button can be released without removing the EC
power rail.
5. EC firmware re-configures the VCI logic so that the VCI_IN# input latches are enabled. This means that subse-
quent presses of the power button do not have to be held until EC firmware switches the VCI logic to firmware
control
6. During this phase the VCI_OUT pin is driven by the firmware-controlled state bit and the VCI input pins are
ignored. However, the EC can monitor the state of the pins, or generate inputs when their state changes
7. At some later point, EC firmware must enter a long-term power-down state.
- Firmware configures the Week Timer for a Sub-Week Alarm once every 8 hours. This will turn on the EC
power rail three times a day and enable the EC to perform low frequency housekeeping tasks even in its low-
est-power state
- Firmware de-asserts VCI_OUT. This action kills power to the EC and automatically returns control of the
VCI_OUT pin to hardware.
- The EC will remain in its lowest-power state until a power pin is pushed, AC power is connected, or the Sub-
Week Alarm is active
DS00001956D-page 454
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