MEC1404 Datasheet, PDF (471/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
39.7 Power, Clocks and Reset
This section defines the Power, Clock, and Reset parameters of the block.
39.7.1 POWER DOMAINS
VTR
Name
39.7.2 CLOCK INPUTS
Description
The logic and registers implemented in this block are powered by this
power well.
Name
48 MHz Ring Oscillator
39.7.3 RESETS
Description
This is the clock source for Keyboard Scan Interface logic.
Name
Description
nSYSRST
RESET_DAC
This signal resets all the registers and logic in this block to their default
state.
This signal resets all registers except the DAC Activate Register to their
default state. It is asserted when either of the following is asserted:
• nSYSRST
• DAC_VREF SOFT_RESET
39.8 Interrupts
There are no interrupts from this block.
39.9 Low Power Modes
The DAC may be in the following power states:
• Deactivated. This mode is entered when the ACTIVATE i s’0’. The DAC analog circuitry is off and clocks are
gated. Registers may be read or written
• Sleeping. This mode is entered when the EC asserts the SLEEP_EN for the DAC and DAC sleep is configured by
the DAC_VREF SLEEP_CONTROL bit. The DAC analog circuitry is off and clocks are gated
• Off. The DAC_ON bit is ‘0’. Analog circuitry is off
• On. The DAC_ON bit is ‘1’. Analog circuitry is on and maintaining a constant value
• Converting. Either the DAC_ON bit or the DAC_DATA field have changed state.
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DS00001956D-page 471