MEC1404 Datasheet, PDF (214/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
12.10.7 MEMORY READ LIMIT 1 REGISTER
Offset ^10h
Bits
Description
Type
15 Reserved
R
14:2 MEMORY_READ_LIMIT_1
R/W
Whenever a read of any byte in the EC Data Register is attempted,
and bit 15 of EC_ADDRESS is 1, the field EC_ADDRESS in the
EC_Address_Register is compared to this field. As long as
EC_ADDRESS is less than this value, the EC_Data_Register will
be loaded from the 32-bit internal address space.
1:0 Reserved
R
12.10.8 MEMORY WRITE LIMIT 1 REGISTER
Default
-
0h
Reset
Event
-
nSYSR
ST
-
-
Offset ^12h
Bits
Description
Type
15 Reserved
R
14:2 MEMORY_WRITE_LIMIT_1
R/W
Whenever a write of any byte in EC DATA Register is attempted
and bit 15 of EC_Address is 1, the field EC_Address[14:2] in the
EC_Address Register is compared to this field. As long as EC_Ad-
dress[14:2] is less than Memory_Write_Limit_1[14:2] the
addressed bytes in the EC DATA Register will be written into the
internal 32-bit address space. If EC_Address[14:2] is greater than
or equal to the Memory_Write_Limit_1[14:2] no writes will take
place.
1:0 Reserved
R
12.10.9 INTERRUPT SET REGISTER
Default
-
0h
Reset
Event
-
nSYSR
ST
-
-
Offset ^14h
Bits
Description
15:1 EC_SWI_SET
EC Software Interrupt Set. This register provides the EC with a
means of updating the Interrupt Source Registers. Writing a bit in
this field with a ‘1b’ sets the corresponding bit in the Interrupt
Source Register to ‘1b’. Writing a bit in this field with a ‘0b’ has no
effect. Reading this field returns the current contents of the Inter-
rupt Source Register.
0 Reserved
Type
R/WS
R
Default
0h
Reset
Event
nSYSR
ST
-
-
DS00001956D-page 214
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