HD6417727BP160CV Datasheet, PDF (938/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 29 D/A Converter
29.1.3 I/O Pins
Table 29.1 summarizes the D/A converter’s input and output pins.
Table 29.1 D/A Converter Pins
Pin Name
Analog power-supply pin
Abbreviation I/O
AVcc
Input
Analog ground pin
Analog output pin 0
Analog output pin 1
AVss
DA0
DA1
Input
Output
Output
Function
Analog power supply and D/A converter
standard voltage
Analog ground
Analog output, channel 0
Analog output, channel 1
29.1.4 Register Configuration
Table 29.2 summarizes the D/A converter’s registers.
Table 29.2 D/A Converter Registers
Name
Abbreviation R/W Initial Value
Address^*1
Access size
D/A data register 0
DADR0
R/W H'00
H'040000A0 8
(H'A40000A0)^*2
D/A data register 1
DADR1
R/W H'00
H'040000A2 8
(H'A40000A2)^*2
D/A control register DACR
R/W H'1F
H'040000A4 8
(H'A40000A4)^*2
Notes: These registers are located in area 1 of physical space. Therefore, when the cache is on,
either access these registers from the P2 area of logical space or else make an appropriate
setting using the MMU so that these registers are not cached.
1. Lower 16 bits of the address
2. When address translation by the MMU does not apply, the address in parentheses
should be used.
Rev.6.00 Mar. 27, 2009 Page 880 of 1036
REJ09B0254-0600