HD6417727BP160CV Datasheet, PDF (348/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 12 Bus State Controller (BSC)
Table 12.3 Physical Address Space Map
Area
0
1
Connectable Memory
Ordinary memory^*1,
burst ROM
Internal I/O registers^*7
Physical Address (A28 to A0)
H'00000000 to H'03FFFFFF
H'00000000 + H'2000000 x n to
H'03FFFFFF + H'2000000 x n
H'04000000 to H'07FFFFFF
Capacity
64 Mbytes
Shadow
64 Mbytes
Access Size
8, 16, 32^*2
(n = 1 to 6)
8, 16, 32^*3
H'04000000 + H'2000000 x n to Shadow
H'07FFFFFF + H'2000000 x n
(n = 1 to 6)
2
Ordinary memory^*1,
H'08000000 to H'0BFFFFFF
64 Mbyte
8, 16, 32^{*3 *4}
Synchronous DRAM
H'08000000 + H'2000000 x n to Shadow
(n = 1 to 6)
H'0BFFFFFF + H'2000000 x n
3
Ordinary memory,
H'0C000000 to H'0FFFFFFF
64 Mbytes 8, 16, 32^{*3 *4}
Synchronous DRAM
H'0C000000 + H'2000000 x n to Shadow
(n = 1 to 6)
H'0FFFFFFF + H'2000000 x n
4
Ordinary memory
H'10000000 to H'13FFFFFF
64 Mbytes 8, 16, 32^*3
H'10000000 + H'2000000 x n to Shadow
H'13FFFFFF + H'2000000 x n
(n = 1 to 6)
5
Ordinary memory,
H'14000000 to H'15FFFFFF
32 Mbytes 8, 16, 32^{*3 *5}
PCMCIA, burst ROM _{H'16000000 to H'17FFFFFF}
32 Mbytes
H'16000000 + H'2000000 x n to Shadow
H'17FFFFFF + H'2000000 x n
(n = 1 to 6)
6
Ordinary memory,
H'18000000 to H'19FFFFFF
32 Mbytes 8, 16, 32^{*3 *5}
PCMCIA, bust ROM
H'1A000000 to H'1BFFFFFF
32 Mbytes
7^*6
Reserved area
H'1A000000 + H'2000000 x n to Shadow
H'1BFFFFFF + H'2000000 x n
H'1C000000 + H'20000000 × n to
H'1FFFFFFF + H'20000000 × n
(n = 1 to 6)
n = 0–7
Notes: 1. Memory with interface such as SRAM or ROM.
2. Use external pin to specify memory bus width.
3. Use register to specify memory bus width.
4. With synchronous DRAM interfaces, bus width must be 16 or 32 bits.
5. With PCMCIA interface, bus width must be 8 or 16 bits.
6. The access to reserved area is prohibited.
7. When the control register in area 1 is not used for address translation by the MMU, set
the top three bits of the logical address to 101 to allocate in the P2 space.
Rev.6.00 Mar. 27, 2009 Page 290 of 1036
REJ09B0254-0600