HD6417727BP160CV Datasheet, PDF (219/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 6 X/Y Memory
Section 6 X/Y Memory
6.1 Overview
The SH7727 has on-chip X-RAM and Y-RAM. It can be used by CPU, DSP and DMAC to store
instructions or data.
6.1.1 Features
The X/Y Memory features are listed in table 6.1.
Table 6.1 X/Y Memory Specifications
Parameter
Addressing
method
Features
User selectable mapping mechanism
• Fixed mapping for mission-critical realtime applications (P2/Uxy area)
• Automatic mapping through TLB for easy to use (P0/P3/U0 area)
Ports
3 independent read/write ports
• 8-/16-/32-bit access from the CPU
• Maximum of two simultaneous 16-bit accesses, or 16/32-bit accesses,
from the DSP
• 8-/16-/32-bit access from the DMAC
Size
8-kbyte RAM for X and Y memory each
Rev.6.00 Mar. 27, 2009 Page 161 of 1036
REJ09B0254-0600