HD6417727BP160CV Datasheet, PDF (890/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 26 Pin Function Controller (PFC)
26.3.6 Port F Control Register (PFCR)
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PF7 PF7 PF6 PF6 PF5 PF5 PF4 PF4 PF3 PF3 PF2 PF2 PF1 PF1 PF0 PF0
MD1 MD0 MD1 MD0 MD1 MD0 MD1 MD0 MD1 MD0 MD1 MD0 MD1 MD0 MD1 MD0
Initial value: 1/0 0 1/0 0 1/0 0 1/0 0 1 0 1 0 1 0 1 0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Port F Control Register (PFCR) is a 16-bit read/write register that selects the pin functions. PFCR
is initialized to H'AAAA (ASEMD0 = 1) or H'00AA (ASEMD0 = 0) by power-on resets;
however, it is not initialized by manual resets, in standby mode, or in sleep mode.
Bits 15, 14: PF7 Mode 1, 0 (PF7MD1, PF7MD0)
Bits 13, 12: PF6 Mode 1, 0 (PF6MD1, PF6MD0)
Bits 11, 10: PF5 Mode 1, 0 (PF5MD1, PF5MD0)
Bits 9, 8: PF4 Mode 1, 0 (PF4MD1, PF4MD0)
Bits 7, 6: PF3 Mode 1, 0 (PF3MD1, PF3MD0)
Bits 5, 4: PF2 Mode 1, 0 (PF2MD1, PF2MD0)
Bits 3, 2: PF1 Mode 1, 0 (PF1MD1, PF1MD0)
Bits 1, 0: PF0 Mode 1, 0 (PF0MD1, PF0MD0)
These bits select the pin functions and the input pullup MOS control.
Bit (2n + 1)
PFnMD1
0
0
1
1
Bit 2n
PFnMD0
0
1
0
1
Pin Function
Reserved (see table 26.1)
Reserved
Port input (Pullup MOS: on)
Port input (Pullup MOS: off)
(Initial value) ASEMD0 = 0
(Initial value) ASEMD0 = 1
(n = 4 to7)
Bit (2n + 1)
PFnMD1
0
0
1
1
Bit 2n
PFnMD0
0
1
0
1
Pin Function
Other function (see table 26.1)
Reserved
Port input (Pullup MOS: on)
Port input (Pullup MOS: off)
(Initial value)
(n = 0 to 3)
Rev.6.00 Mar. 27, 2009 Page 832 of 1036
REJ09B0254-0600