HD6417727BP160CV Datasheet, PDF (549/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 17 Serial Communication Interface (SCI)
Bit 2—Multiprocessor Mode (MP): Selects multiprocessor format. When multiprocessor format
is selected, settings of the parity enable (PE) and parity mode (O/E) bits are ignored. The MP bit
setting is used only in the asynchronous mode; it is ignored in the clock synchronous mode. For
the multiprocessor communication function, see section 17.3.3, Multiprocessor Communication.
Bit 2: MP
0
1
Description
Multiprocessor function disabled
Multiprocessor format selected
(Initial value)
Bits 1 and 0—Clock Select 1 and 0 (CKS1 and CKS0): These bits select the internal clock
source of the on-chip baud rate generator. Four clock sources are available. Pφ, Pφ/4, Pφ/16 and
Pφ/64. For further information on the clock source, bit rate register settings, and baud rate, see
section 17.2.9, Bit Rate Register (SCBRR).
Bit 1: CKS1 Bit 0: CKS0
0
0
1
1
0
1
Note: Pφ: Peripheral clock
Description
Pφ
Pφ/4
Pφ/16
Pφ/64
(Initial value)
17.2.6 Serial Control Register (SCSCR)
Bit:
7
6
5
TIE
RIE
TE
Initial value:
0
0
0
R/W: R/W R/W R/W
4
3
2
1
0
RE MPIE TEIE CKE1 CKE0
0
0
0
0
0
R/W R/W R/W R/W R/W
The serial control register (SCSCR) operates the SCI transmitter/receiver, selects the serial clock
output in the asynchronous mode, enables/disables interrupt requests, and selects the
transmit/receive clock source. The CPU can always read and write the SCSCR. The SCSCR is
initialized to H'00 by a reset or in standby and module standby modes.
Rev.6.00 Mar. 27, 2009 Page 491 of 1036
REJ09B0254-0600