HD6417727BP160CV Datasheet, PDF (802/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 24 USB HOST Module
24.2.15 HcFmRemaining
HcFrameRemaining Register (H'04000438)
The HcFmRemaining register is a 14-bit down counter indicating the bit time remaining in the
current frame.
Register: HcFrameRemaining
Bits
Reset R/W
31
0b
R
30–14 0h
—
13–0
0b
R
Offset: 38–3B
Description
FrameRemainingToggle (FRT)
This bit is always loaded from the FrameIntervalToggle bit in
HcFminterval when FrameReamining reaches 0. This bit is used
by HCD for the synchronization between FrameInterval and
FrameReamining.
Reserved.
FrameRemaining (FR)
This counter is decremented at each bit time. When this counter
reaches 0, this counter is reset by loading the value of the
FramInterval bit specified in the HcFminterval register at the
next bit time boundary. When the host controller transits to the
UsbOperational state, it read the FrameInterval bit in the
HcFminterval register again and use the updated value from the
next SOF.
Rev.6.00 Mar. 27, 2009 Page 744 of 1036
REJ09B0254-0600