HD6417727BP160CV Datasheet, PDF (1008/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 32 Electrical Characteristics
Item
Symbol Min Max Unit Conditions
Figure
Write data hold time 1 t_WDH1 1.5 —
ns
32.17 to 32.19,
32.34, 32.35,
32.38 to 32.40
Write data hold time 2 t_WDH2 1.5 —
ns
32.27 to 32.30
Write data hold time 3 t_WDH3 2
—
ns
32.17 to 32.19
Write data hold time 4 t_WDH4 2
—
ns
32.34, 32.35,
32.38 to 32.40
WAIT setup time
t_WTS
5
6
—
ns Vcc = 1.70 to 2.05 V 32.18 to 32.22,
VccQ = 3.0 to 3.6 V ^{32.35, 32.37,}
32.39, 32.40
—
Other than the above
WAIT hold time
t_WTH
0
—
ns
32.18 to 32.22,
32.35, 32.37,
32.39, 32.40
RAS delay time 2
t_RASD2 1.5
12
ns
32.23 to 32.33
CAS delay time 2
t_CASD2 1.5
12
ns
32.23 to 32.33
DQM delay time
t_DQMD
1.5
10
ns
32.23 to 32.30
CKE delay time
t_CKED
1.5
12
ns
ICIORD delay time
t_ICRSD
—
12
ns
ICIOWR delay time
t_ICWSD
—
12
ns
32.32
32.38 to 32.40
32.38 to 32.40
IOIS16 setup time
t_IO16S
12
—
ns
32.39, 32.40
IOIS16 hold time
t_IO16H
4
—
ns
32.39, 32.40
DACK delay time 1
t_DAKD1
—
10
ns
32.17 to 32.30,
32.33 to 32.40
Notes: 1. t_AH: This is to deal with the latest negate timing of CSn, RD, or WEn.
2. t_RDH1: This is to deal with the earliest negate timing of CSn or RD.
Rev.6.00 Mar. 27, 2009 Page 950 of 1036
REJ09B0254-0600