HD6417727BP160CV Datasheet, PDF (937/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 29 D/A Converter
Section 29 D/A Converter
29.1 Overview
This LSI includes a D/A converter with two channels.
29.1.1 Features
D/A converter features are listed below.
• Eight-bit resolution
• Two output channels
• Conversion time: maximum 10 µs (with 20-pF capacitive load)
• Output voltage: 0 V to AVcc
29.1.2 Block Diagram
Figure 29.1 shows a block diagram of the D/A converter.
AV_CC
DA₁
DA₀
AV_SS
8-bit D/A
Module data bus
On-chip
data bus
Legend:
DACR: D/A control Register
DADR0: D/A data register 0
DADR1: D/A data register 1
Control circuit
Figure 29.1 D/A Converter Block Diagram
Rev.6.00 Mar. 27, 2009 Page 879 of 1036
REJ09B0254-0600