HD6417727BP160CV Datasheet, PDF (653/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 19 Serial Communication Interface with FIFO (SCIF)
1
Serial
data
TDFE
Start
bit
0 D₀
Parity Stop Start
Data bit bit bit
D₁
D₇ 0/1 1 0 D₀
Parity Stop
Data bit bit 1
D₁
D₇ 0/1 1
Idle
state
(mark state)
TEND
TXI interrupt Data written to TXI interrupt
request SCFTDR2 and TDFE request
flag read as 1 then
cleared to 0 by TXI
interrupt handler
One frame
Figure 19.6 Example of Transmit Operation
(Example with 8-Bit Data, Parity, One Stop Bit)
4. When modem control is enabled, transmission can be stopped and restarted in accordance with
the CTS2 input value. When CTS2 is set to 1, if transmission is in progress, the line goes to
the mark state after transmission of one frame. When CTS2 is set to 0, the next transmit data
is output starting from the start bit.
Figure 19.7 shows an example of the operation when modem control is used.
Serial
data
TxD2
Start
bit
0 D₀ D₁
Parity Stop
bit bit
D₇ 0/1
Start
bit
0 D₀ D₁
D₇ 0/1
CTS2
Rise this point
before a stop bit
Figure 19.7 Example of Operation Using Modem Control (CTS2)
Rev.6.00 Mar. 27, 2009 Page 595 of 1036
REJ09B0254-0600