HD6417727BP160CV Datasheet, PDF (234/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 7 Interrupt Controller (INTC)
Table 7.5 Interrupt Exception Handling Sources and Priority (IRL Mode)
Interrupt Source
INTEVT Code
(INTEVT2 Code)
Interrupt
Priority
(Initial IPR (Bit
Value) Numbers)
Priority
within IPR
Setting Default
Unit
Priority
NMI
H'1C0 (H'1C0)
16
—
—
High
H-UDI
H'5E0 (H'5E0)
15
—
—
IRL
IRL(3:0) = 0000 H'200 (H'200)
15
—
—
IRL(3:0) = 0001 H'220 (H'220)
14
—
—
IRL(3:0) = 0010 H'240 (H'240)
13
—
—
IRL(3:0) = 0011 H'260 (H'260)
12
—
—
IRL(3:0) = 0100 H'280 (H'280)
11
—
—
IRL(3:0) = 0101 H'2A0 (H'2A0)
10
—
—
IRL(3:0) = 0110 H'2C0 (H'2C0)
9
—
—
IRL(3:0) = 0111 H'2E0 (H'2E0)
8
—
—
IRL(3:0) = 1000 H'300 (H'300)
7
—
—
IRL(3:0) = 1001 H'320 (H'320)
6
—
—
IRL(3:0) = 1010 H'340 (H'340)
5
—
—
IRL(3:0) = 1011 H'360 (H'360)
4
—
—
IRL(3:0) = 1100 H'380 (H'380)
3
—
—
IRL(3:0) = 1101 H'3A0 (H'3A0)
2
—
—
IRL(3:0) = 1110 H'3C0 (H'3C0)
1
—
—
IRQ
IRQ4
H'200–3C0* (H'680) 0–15 (0) IPRD (3–0) —
IRQ5
H'200–3C0* (H'6A0) 0–15 (0) IPRD (7–4) —
PINT PINT0–7
H'200–3C0* (H'700) 0–15 (0) IPRD (15–12) —
PINT8–15
H'200–3C0* (H'720) 0–15 (0) IPRD (11–8) —
DMAC DEI0
H'200–3C0* (H'800) 0–15 (0) IPRE (15–12) High
DEI1
H'200–3C0* (H'820)
DEI2
H'200–3C0* (H'840)
DEI3
H'200–3C0* (H'860)
Low
SCIF ERI2
H'200–3C0* (H'900) 0–15 (0) IPRE (7–4) High
RXI2
H'200–3C0* (H'920)
BRI2
H'200–3C0* (H'940)
TXI2
H'200–3C0* (H'960)
Low
Low
Rev.6.00 Mar. 27, 2009 Page 176 of 1036
REJ09B0254-0600