HD6417727BP160CV Datasheet, PDF (877/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 25 LCD Controller
25.5 Usage Notes
Note the following points when using the LCDC.
1. The following steps should be performed to prohibit access to the system memory used for
LCDC module display (synchronous DRAM in area 3).
(1) Confirm that bits LPS1 and LPS0 in the LDPMMR register are set to 1.
(2) Clear the DON bit in LDCNTR to 0 (display off mode).
(3) Confirm that bits LPS1 and LPS0 in LDPMMR are cleared to 0.
(4) Wait the display duration of one frame.
The above steps to prohibit access are necessary before entering standby mode or using the
LCDC module’s standby function.
2. Notes on use of LCDC external clock
When in clock mode 2 (crystal resonator used) and an external clock (LCLK) is used as the
LCD clock, changes in the state of the LCLK output pin can cause noise that affects the crystal
oscillator circuit, resulting in unstable PLL operation and possible malfunction.
In such a case, implement one of the following measures:
• Use an internal clock as the LCD clock when in clock mode 2.
• When using an external clock (LCLK) as the LCD clock, select a mode other than clock
mode 2 (external input on EXTAL pin).
Rev.6.00 Mar. 27, 2009 Page 819 of 1036
REJ09B0254-0600