HD6417727BP160CV Datasheet, PDF (315/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 10 On-Chip Oscillation Circuits
Section 10 On-Chip Oscillation Circuits
10.1 Overview
The on-chip oscillation circuits consist of the clock pulse generator (CPG) and watchdog timer
(WDT).
The clock pulse generator (CPG) supplies all clocks to the processor and controls the power-down
modes.
The watchdog timer (WDT) is a single-channel timer that counts the clock settling time and is
used when clearing standby mode and temporary standby, such as frequency changes. It can also
be used as an ordinary watchdog timer or interval timer.
10.1.1 Features
The CPG has the following features:
• Four clock modes: Selection of four clock modes for different frequency ranges, power
consumption, direct crystal input, and external clock input.
• Three clocks generated independently: An internal clock for the CPU, cache, and TLB (Iφ); a
peripheral clock (Pφ) for the on-chip supporting modules; and a bus clock (CKIO) for the
external bus interface.
• Frequency change function: Internal and peripheral clock frequencies can be changed
independently using the PLL circuit and divider circuit within the CPG. Frequencies are
changed by software using frequency control register (FRQCR) settings.
• Power-down mode control: The clock can be stopped for sleep mode and standby mode and
specific modules can be stopped using the module standby function.
Rev.6.00 Mar. 27, 2009 Page 257 of 1036
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