HD6417727BP160CV Datasheet, PDF (723/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 21 Analog Front End Interface (AFEIF)
Bit 10—Rx FIFO Full Interrupt Mask (RFFM)
Bit 10: RFFM
0
1
Description
RFF Interrupt enable
RFF Interrupt masked
(Initial value)
Bit 9—Threshold of Tx FIFO Empty Interrupt Mask (THEM)
Bit 9: THEM
0
1
Description
THE Interrupt enable
THE Interrupt masked
(Initial value)
Bit 8—Threshold of Rx FIFO Full Interrupt Mask (RHFM)
Bit 8: RHFM
0
1
Description
RHF Interrupt enable
RHF Interrupt masked
(Initial value)
Bit 3—Tx FIFO Empty Interrupt (TFE)
Bit 3: TFE
0
1
Description
Normal state
TFIFO empty interrupt
(Initial value)
Set condition:
1. Reset
2. No effective data in area of FIFO
3. TE bit (ACTR1) is set to 0
(TFEM is automatically masked in case 3.)
Clear condition:
1. Data are written into FIFO
Rev.6.00 Mar. 27, 2009 Page 665 of 1036
REJ09B0254-0600