HD6417727BP160CV Datasheet, PDF (692/1098 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/ SH7700 Series

Section 20 Serial IO (SIOF)
20.3.4 Register Assignment for Transfer Data
(1) Transmit or Receive Data
Writing into/reading out of transmit/receive data is done for the following registers.
• Writing transmit data: SITDR register (32 bit access)
• Reading receive data: SIRDR register (32 bit access)
Figure 20.5 shows bit alignment of transmit or receive data and SITDR and SIRDR registers.
(a) At the 16 bit stereo
31
24 23
16 15
87
0
Lch. data
Rch. data
(b) At the 16 bit monaural
31
24 23
16 15
87
0
Data
(c) At the 8 bit monaural
31
24 23
16 15
87
0
Data
(d) At the 16 bit stereo (right and left same sound)
31
24 23
16 15
87
0
Data
Figure 20.5 Transmit or Receive Data Bit Alignment
Note: In figure 20.5, only data portions that are shown by the oblique lines are transmitted or
received as effective data.
Thus, the areas without the oblique lines are not the object to transmit or receive.
Rev.6.00 Mar. 27, 2009 Page 634 of 1036
REJ09B0254-0600